The Egret platform for reconfigurable system on chip

Embedded systems are an appealing application domain for reconfigurable System-on-Chip (rSoC) technology. However, rSoC design is inherently a complex task with enormous freedom in design parameters such as processor, operating system, and backplane buses. Design efficiency can potentially be improved by the use of an rSoC platform which constrains these choices, and allows new designs to leverage much of the expertise of previous designs. This paper explains and justifies the design decisions for the first version of Egret, which is an rSoC prototyping platform being developed at the University of Queensland, Australia.